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Krishnan, Shoba

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Shoba Krishnan

Biography

Shoba Krishnan is the Thomas J. Bannan Professor in the Department of Electrical and Computer Engineering at Santa Clara University. Prior to joining SCU, she worked in high-speed data communication IC design and testing with the Mixed-Signal Design Group at LSI Logic Corporation (Milpitas, CA). Krishnan’s expertise and research interests include analog and mixed-signal integrated circuit design and testing, with projects in high-speed data communication systems with special emphasis on power, clock, and data I/O circuits. Her research focuses on challenges in both mixed-signal IC design and test and integration of these analog blocks into standard digital IC environments. She has a strong interest in engineering education and has several ongoing community-based activities to increase the participation of underrepresented groups in engineering, including advising the SCU IEEE chapter. Krishnan was named "Woman of the Year" by California's 25th Assembly District in 2013 for her dedication to students both inside and outside the classroom as well as her work on community projects and STEM education. She was also commended for her role in motivating young women and other marginalized communities to pursue science and engineering as a profession. Krishnan earned a B. Tech. degree from Jawaharlal Nehru Technological University in India and M.S. and Ph.D. degrees from Michigan State University.

Research Interests

Analog and Mixed-Signal IC Design and Testing

Publications
  • Abugharbieh, K; Krishnan, S; Mohan, J; Devnath, V, “An Ultra Low Power 10Gbps LVDS Output Driver,” IEEE Transactions on Circuits and Systems I: Regular Papers – forthcoming section, Digital Object Identifier: 10.1109/TCSI.2009.2015721.
  • R. White, S. Luchas and S. Krishnan, “Analysis of Errors in a Comparator-Based Switched-Bapacitor Biquad-filter," accepted to the IEEE Transactions on Circuits and Systems- II Express Briefs, Vol. 56, Sept. 2009, pages 704-708.
  • F.R. Madriz, J.R. Jameson, S. Krishnan, X. Sun, and C. Y. Yang, "Circuit Modeling of High-Frequency Electrical Conduction in Carbon Nanofibers," IEEE Transactions on Electron Devices 56, August 2009, pages 1557-1561.
  • Wu, S. Krishnan, T. Yamada, X. Sun, P. Wilhite, R. Wu, K. Li, and C.Y. Yang, “Contact resistance in carbon nanostructure via interconnects,” Applied Physics Letters 94, 163113 (1-3) (2009).
  • Q. Ngo, A.M. Cassell, V. Radmilovic, J. Li, S. Krishnan, M. Meyyappan, and C.Y. Yang, "Palladium catalyzed formation of carbon nanofibers by plasma enhanced chemical vapor deposition," Carbon 45, 424-428 (2007).
  • Q. Ngo, A.M. Cassell, A.J. Austin, J. Li, S. Krishnan, M. Meyyappan, and C.Y. Yang, “Characteristics of Aligned Carbon Nanofibers for Interconnect Via Applications,” IEEE Electron Device Letters 27, 221- 224 (2006).
  • S. Yu, D.M. Petranovic, S. Krishnan, K. Lee, and C.Y. Yang, “Loop-Based Inductance Extraction and Modeling for Multiconductor On-Chip Interconnects,” IEEE Transactions on Electron Devices 53, 135- 145 (2006).
  • Q. Ngo, D. Petranovic, S. Krishnan, A.M. Cassell, Q. Ye, J. Li, M. Meyyappan, and C.Y. Yang, “Electron Transport through Metal-Multiwall Carbon Nanotube Interfaces,” IEEE Transactions on Nanotechnology 3, 311-317 (2004).
  • S.L. Lin, S. Krishnan and S. Mourad, “A Self-Binning BIST structure for Data Communications Transceivers", IEEE Transactions on Instrumentation and Measurement, 52, 1399-1407, 2003.
  • S.-P. Sim, S. Krishnan, D. Petranovic, N. Arora, K. Lee, and C. Y. Yang, “A Unified RLC Model for High- Speed On-Chip Interconnects,” IEEE Transactions on Electron Devices 50, 1501-1510 (2003).
  • Wey, C.L., Krishnan, S., and S. Sahli, "Test Generation and Concurrent Error Detection in Current- Mode A/D converters," IEEE Transactions on Computer-Aided Design, Vol. 14, No. 1, pp. 1191-1198, 1995.
  • Krishnan, S., and C.L. Wey, "An Accurate Reference-generating Circuit for Algorithmic Current- mode A/D Converters," International Journal of Circuit Theory and Application, Vol. 21, pp. 361-369, 1993.
  • Wey, C.L., Krishnan, S., and S. Sahli, "Design of Concurrent Error Detectable Current-Mode A/D Converters for Real-time Applications," Analog Integrated Circuits and Signal Processing, Vol. 4, pp. 65- 74, 1993.
  • Wey, C.L. and S. Krishnan, "Built-In Self-Test (BIST) Structures for Analog Circuit Fault Diagnosis with Current Test Data," IEEE Trans. on Instrumentation and Measurement, Vol. 41, No. 4, pp. 535- 539, 1992.
  • Wey, C.L. and S. Krishnan, "An Accurate Current-mode Divide-by-two Circuit," Electronics Letters, Vol. 28, No.9, pp.820-822, 1992.

Conference Proceedings

  • K. Hariharan, S. Krishnan and S. Luschas, "A Delta Sigma based DC-DC converter – A Design Space exploration," Eighth International Conference on Power Electronics and Drive Systems, Taipei, Taiwan, Nov. 2009.
  • F.R. Madriz, J.R. Jameson, S. Krishnan, X. Sun, and C.Y. Yang, "Test Structure to Extract Circuit Models of Nanostructures Operating at High Frequencies," International Conference on Microelectronic Test Structures," Oxnard, CA, March 31 - April 2, 2009, pp. 36-38.
  • W. Wu, S. Krishnan, K. Li, X. Sun, R. Wu, T. Yamada, and C.Y. Yang, “ Extracting Resistances of Carbon Nanostructures in Vias,” International Conference on Microelectronic Test Structures,” Oxnard, CA, March 31 - April 2, 2009, pp. 27-30.
  • Abugharbieh, K; Krishnan, S; Mohan, J; Devnath, V, “A Low Power 10 Gbps Voltage Mode Driver with Good Return Loss Performance,” Proceeding of International Conference on Microelectronics, Dec. 2008, pp. 316-319.
  • Abugharbieh, K; Mohan, J; Devnath, V; Duzevik, I; Krishnan, S, “An ultra low power 10 Gbps LVDS output driver,” Proceedings of the 2008 Bipolar/BiCMOS Circuits and Technology meeting, Oct. 2008, pp. 5-8.
  • W. Wu, D. Nguyen, P. Wilhite, T. Saito, S. Krishnan, and C.Y. Yang, "Design and characterization of carbon nanofibers for via applications," Proceedings of IEEE NANO 2008, Arlington, TX, August 18-21, 2008, pp. 300-301.
  • Francisco Madriz, John R. Jameson, Shoba Krishnan, Kris Gleason. Xuhui Sun, and Cary Y. Yang, “Measurement and Circuit Model of Carbon Nanofibers at Microwave Frequencies,” Proceedings of 2008 IEEE International Interconnect Technology Conference, Burlingame, California, June 1-4, 2008, pp. 138-140.
  • K. Ring, and S. Krishnan, “Long-term Jitter Reduction through supply noise compensation," Proceedings of the IEEE International Symposium on Circuits and Systems, (ISCAS) May 2008, Page(s):2382 - 2385.
  • S. Raman, S. Krishnan and A. Fiedler, "A precise clock phase multiplier," Proceedings of the IEEE International Symposium on Circuits and Systems, (ISCAS) May 2005, Page(s):2639 – 2642, Vol. 3.
  • Q. Ngo, A. M. Cassell, J. Li, S. Krishnan, M. Meyyappan, and C. Y. Yang, "Vertically aligned carbon nanofiber arrays for on-chip interconnect applications", Proceedings of 2005 IEEE International Interconnect Technology Conference, pp 153-155.
  • Q. Ngo, S. Krishnan, A. M. Cassell, Y. Ominami, J. Li, M. Meyyappan, and C. Y. Yang, "Electrical characterization of carbon nanofibers for on-chip interconnect applications", Proceedings of IEEE NANO, pp 585-588, 2005. (Invited)
  • Q. Ngo, Y. Ominami, H. Yoong, A. J. Austin, A. M. Cassell, B. A. Cruden, J. Li, S. Krishnan, M. Meyyappan, and C. Y. Yang, "Electrical and structural characterization of vertically aligned carbon nanofibers synthesized by plasma-enhanced CVD", HP QSR Symposium, March 2005.
  • S. Yu, S. Sim, S. Krishnan, D.M. Petranovic, K. Lee, and C.Y. Yang, “Unified Model for On-Chip Interconnects,” Proceedings of the 7th International Conference on Semiconductor and Integrated Circuit Technology,” Beijing, October 18-21, 2004, Paper #D3.1. (Invited paper)
  • Q. Ngo, S. Krishnan, A. Stimpfle, M. Meyyappan, and C. Y. Yang, "Schottky Barrier Behavior of Metallic Multiwall Carbon Nanotube Systems," Proceedings of IEEE NANO, pp. 119-120, 2004.
  • Hariharan, K., S. Krishnan and V. P. Gopinath, "Impact of Gate Leakage on the Performance of Analog Integrated Circuits - A Simulation Study," Proceedings of the International Conference on VLSI, 465-471, June 2004.
  • Grover, R., S. Krishnan and Weijia Shang, "Performance Trade-offs of DCT with Variable Length Carry Chains in FPGAs," Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 442-448, June 2004.
  • S. Yu, D. M. Petranovic, S. Krishnan, K. Lee, and C. Y. Yang, “Effects of Resistance Matrix on Modeling of Crosstalk in Multiconductor Systems,” Proceedings of ISQED 2004, pp. 122-125.
  • Q. Ngo, D. Petranovic, H. Yoong, S. Krishnan, and C. Y. Yang, “Surface Phenomena at Metal-Carbon Nanotube Interfaces,” Proceedings of IEEE NANO, pp. 252-255, 2003.
  • P. Sim, C. Chao, S. Krishnan, D. M. Petranovic, N. D. Arora, K. Lee, and C. Y. Yang, “An Effective Loop Inductance Model for General Non-Orthogonal Interconnect with Random Capacitive Coupling,” Technical Digest of 2002 International Electron Devices Meeting (IEDM), San Francisco, December 9- 11, 2002, pp. 315-318.
  • P. Sim, N.D. Arora, C. Chao, S. Krishnan, K. Lee, and C. Y. Yang, “Analytical Capacitance Model for High-Speed Interconnect with Diagonal Routing,” Proceedings of 2002 IEEE International Interconnect Technology Conference, Burlingame, California, June 3-5, 2002, pp. 157-158.
  • S.L. Lin, S. Mourad and S. Krishnan, “At-Speed Testing of Data Communications Transceivers", Proceedings of the IEEE International Symposium on Circuits and Systems, May 2001.
  • S.L. Lin, S. Mourad and S. Krishnan, “A BIST methodology for At-Speed Testing of Data Communications Transceivers", Proceedings of the 9th Asian Test Symposium, 216-221, 2000.
  • Fiedler, A., Mactaggart, R., Welch, J., and S. Krishnan, “A 1.0625 GB/s Transceiver with 2xOversampling and Transmit Signal Pre-emphasis”, ISSCC Digest of Technical papers, Vol. 40, pp. 238-239, February 1997.
  • Hum, H.H.J; Maquelin, O.; and others " A design study of the EARTH Multiprocessor", Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, PACT 95, Limassol, Cyprus, 27-29 June 1995.
  • Krishnan, S., and C.L. Wey, "A Current-Mode A/D Converter Array with a Common Current ReferenceGenerating Circuit," 37th Midwest Symposium on Circuits and Systems, August 3-5, 1994.
  • Noren, K., Shami, Q.R., and S. Krishnan, "A PSpice Model for an A/D Converter," 37th Midwest Symposium on Circuits and Systems, August 3-5, 1994.
  • Sahli, S., Krishnan, S., and C.L.Wey, "Design of Concurrent Error Detectable Current-Mode A/D converters," Proc. International Conference on Microelectronics, Tunisia, December 1992.
  • Krishnan, S., Sahli, S., and C.L. Wey, "Test Generation and Concurrent Error Detection in Current- Mode A/D converters," Proc. IEEE International Test Conference, pp. 312- 320, September 1992.

Conference Presentations

  • Haner, R.L., Krishnan, S., and Burns, S.T., “Spiral Inductors with Projected Floating Shields: An Alternative Method for RF Shielding,” IEEE International Symposium on Circuits and Systems, May 2009, pp. 1771-1774.
  • K. Li, X. Sun, R. Wu, W. Wu, S. Krishnan, and C.Y. Yang, “Contact Resistance in Carbon Nanotube Interconnect Vias,” Materials Research Society Spring Meeting, Symposium D: Materials, Processes, and Reliability for Advanced Interconnects for Micro- and Nano-Electronics, San Francisco (April 2009).
  • W. Wu, X. Sun, J. Jameson, D. Nguyen, P. Wilhite, S. Krishnan, and C.Y. Yang, “Electrical Properties of Carbon Nanofiber Interconnect Vias,” Materials Research Society Fall Meeting, Symposium JJ: Nanotubes and Related Nanostructures, Boston (December 2008).
  • F. Madriz, J.R. Jameson, S. Krishnan, K. Gleason, X. Sun, and C.Y. Yang, “Measurement and circuit model of carbon nanofibers at radio frequencies,” Materials Research Society Spring Meeting, Symposium P: Carbon Nanotubes and Related Low-dimensional Materials, San Francisco (March 2008).
  • X. Sun, F. Madriz, W. Wu, J.R. Jameson, S. Krishnan, and C.Y. Yang, “Test structure for measurement of high-frequency behavior of one-dimensional on-chip interconnect materials,” Materials Research Society Spring Meeting, Symposium N: Materials and Processes for Advanced Interconnects for Microelectronics, San Francisco (March 2008).
  • W. Wu, D. Nguyen, P. Wilhite, T. Saito, S. Krishnan, and C. Y. Yang, “Design and Characterization of Carbon Nanofibers for Via Applications”, IEEE 8th International Conference on Nanotechnology, (August 2008).
  • A.J. Austin, C. Estonilo, Q.Ngo, C.V. Nguyen, S. Krishnan, "The Carbon Nanotube Enhanced Tunneling Diode Via In Situ Highly Controlled Electric Field Induced Surface Functionalization," Materials Research Society, Spring Meeting, Symposium EE: Applications of Nanotubes and Nanowires, San Francisco (April 2007).
  • Venkatraman, V., S. Krishnan and N. Ling, "Architecture for de-blocking filter in H.264," Proceedings of the Picture Coding Symposium 2004 (PCS), December 2004.
  • S. Yu, S. Krishnan, and C.Y. Yang, “Interconnect Modeling for Frequency-Dependent Crosstalk Noise Analysis,” Symposium on Compact Modeling, IEEE Electron Device Society Santa Clara Valley Chapter, May 7, 2004. (invited presentation)

Patents

Fiedler, A., and S. Krishnan, “Time Division Data Multiplexer with Feedback for Clocks Crossover Adjustment”, Patent No. 5,805,089, Issued September 1998.